module Forward(
    input [4:0] MEM_gprWeSel, 
    input [4:0] WB_gprWeSel, 
    input [4:0] EX_rt,
    input [4:0] EX_rs, 
    input MEM_RegW, 
    input WB_RegW, 
    output reg [1:0] forwardA, 
    output reg [1:0] forwardB, 
    input [1:0] EX_RegDst
);

    always @(*) begin

        forwardA = 2'b00;
        forwardB = 2'b00;
        if (MEM_RegW && MEM_gprWeSel != 0 && MEM_gprWeSel == EX_rs)
            forwardA = 2'b10;
        else if (WB_RegW && WB_gprWeSel != 0 && WB_gprWeSel == EX_rs)
            forwardA = 2'b01;
        if (MEM_RegW && MEM_gprWeSel != 0 && MEM_gprWeSel == EX_rt && EX_RegDst)
            forwardB = 2'b10;
        else if (WB_RegW && WB_gprWeSel != 0 && WB_gprWeSel == EX_rt)
            forwardB = 2'b01;

    end

endmodule